1. Field
Exemplary embodiments of the present invention relate to a semiconductor memory device capable of repairing defective memory cells occurring after packaging, and a method of operating the semiconductor memory device.
2. Description of the Related Art
Semiconductor memory devices, such as a Dynamic Random Access Memory (DRAM) device, generally go through a wafer-level test, which is referred to as ‘a wafer test’ hereafter, and a post-packaging test, which is referred to as ‘a package and module test’ hereafter, to determine whether there are any defects in the chips, after the semiconductor memory devices are designed and fabricated.
When defective memory cells are detected in a wafer test, the defective memory cells may be replaced with redundant memory cells in the inside of a DRAM device. However, defective memory cells detected in a package and module test cannot be replaced with redundant memory cells and cause chip failure, thus deteriorating the package yield.
In particular, when a DRAM package or module is fabricated, heat energy applied to a DRAM chip may deteriorate the refresh characteristics and cause failure bits. The failure bits may lead to a decreased yield. Generally, the yield drops more as the chips become smaller. To overcome this problem and bring up a tail part of a refresh characteristics graph in which the refresh characteristics appear poor, the wafer test has to be performed more strictly, and the strict wafer test also decreases the yield. To minimize the decrease in the yield, a failure address occurring due to heat after a package or a module is fabricated has to be repaired. However, packages or modules do not have a memory for storing a failure address, hence, there is a limitation in repairing failure bits of a DRAM after a package is fabricated and it takes a long time to perform the test.